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| author | Dennis Brentjes <d.brentjes@gmail.com> | 2020-03-17 19:13:16 +0100 |
|---|---|---|
| committer | Dennis Brentjes <d.brentjes@gmail.com> | 2020-03-18 12:28:46 +0100 |
| commit | 6cfbc1decb59e3dd987c0260a9b6d50bd6d2225c (patch) | |
| tree | e27714bf46e74b7453bc9fe24b20ee328a86e16c /PiCl/PiCl.pretty/SOP65P640X110-16N.kicad_mod | |
| parent | d68d3a8f7d7bc55c7d30ca4063d446d01e7e4c4a (diff) | |
| download | PiCl-6cfbc1decb59e3dd987c0260a9b6d50bd6d2225c.tar.gz PiCl-6cfbc1decb59e3dd987c0260a9b6d50bd6d2225c.tar.bz2 PiCl-6cfbc1decb59e3dd987c0260a9b6d50bd6d2225c.zip | |
Reworks big parts of the schematic. other muxes and JK-flipflops
Diffstat (limited to 'PiCl/PiCl.pretty/SOP65P640X110-16N.kicad_mod')
| -rw-r--r-- | PiCl/PiCl.pretty/SOP65P640X110-16N.kicad_mod | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/PiCl/PiCl.pretty/SOP65P640X110-16N.kicad_mod b/PiCl/PiCl.pretty/SOP65P640X110-16N.kicad_mod new file mode 100644 index 0000000..f841238 --- /dev/null +++ b/PiCl/PiCl.pretty/SOP65P640X110-16N.kicad_mod @@ -0,0 +1,49 @@ +(module "SOP65P640X110-16N" (layer F.Cu) + (descr "TSSOP16-5") + (tags "Integrated Circuit") + (attr smd) + (fp_text reference IC** (at 0 0) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.254))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1.27 1.27) (thickness 0.254))) + ) + (fp_text value "SOP65P640X110-16N" (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.254))) + ) + (fp_line (start -3.925 -2.8) (end 3.925 -2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.925 -2.8) (end 3.925 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.925 2.8) (end -3.925 2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.925 2.8) (end -3.925 -2.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.2 -2.5) (end 2.2 -2.5) (layer F.Fab) (width 0.1)) + (fp_line (start 2.2 -2.5) (end 2.2 2.5) (layer F.Fab) (width 0.1)) + (fp_line (start 2.2 2.5) (end -2.2 2.5) (layer F.Fab) (width 0.1)) + (fp_line (start -2.2 2.5) (end -2.2 -2.5) (layer F.Fab) (width 0.1)) + (fp_line (start -2.2 -1.85) (end -1.55 -2.5) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -2.5) (end 1.85 -2.5) (layer F.SilkS) (width 0.2)) + (fp_line (start 1.85 -2.5) (end 1.85 2.5) (layer F.SilkS) (width 0.2)) + (fp_line (start 1.85 2.5) (end -1.85 2.5) (layer F.SilkS) (width 0.2)) + (fp_line (start -1.85 2.5) (end -1.85 -2.5) (layer F.SilkS) (width 0.2)) + (fp_line (start -3.675 -2.85) (end -2.2 -2.85) (layer F.SilkS) (width 0.2)) + (pad 1 smd rect (at -2.938 -2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 2 smd rect (at -2.938 -1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 3 smd rect (at -2.938 -0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd rect (at -2.938 -0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd rect (at -2.938 0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 6 smd rect (at -2.938 0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 7 smd rect (at -2.938 1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 8 smd rect (at -2.938 2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 9 smd rect (at 2.938 2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 10 smd rect (at 2.938 1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 11 smd rect (at 2.938 0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 12 smd rect (at 2.938 0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 13 smd rect (at 2.938 -0.325 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 14 smd rect (at 2.938 -0.975 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 15 smd rect (at 2.938 -1.625 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (pad 16 smd rect (at 2.938 -2.275 90) (size 0.45 1.475) (layers F.Cu F.Paste F.Mask)) + (model NX3L4051PW,118.stp + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) +) |
