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| author | Dennis Brentjes <d.brentjes@gmail.com> | 2020-03-24 16:32:45 +0100 |
|---|---|---|
| committer | Dennis Brentjes <d.brentjes@gmail.com> | 2020-03-24 16:32:45 +0100 |
| commit | eade5c17f6c84b37f1b622483ba5bfdfb0388133 (patch) | |
| tree | c4b6e7a8e81506d8c87a7d65a8b34cad445df764 /PiCl/PiCl-cache.lib | |
| parent | 467309be26b711a22d4ea672ff2b194a6be715ea (diff) | |
| download | PiCl-eade5c17f6c84b37f1b622483ba5bfdfb0388133.tar.gz PiCl-eade5c17f6c84b37f1b622483ba5bfdfb0388133.tar.bz2 PiCl-eade5c17f6c84b37f1b622483ba5bfdfb0388133.zip | |
Finished routing a V1 pcb.
Diffstat (limited to 'PiCl/PiCl-cache.lib')
| -rw-r--r-- | PiCl/PiCl-cache.lib | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/PiCl/PiCl-cache.lib b/PiCl/PiCl-cache.lib index 6a9cb5b..b778690 100644 --- a/PiCl/PiCl-cache.lib +++ b/PiCl/PiCl-cache.lib @@ -470,4 +470,18 @@ X pwr 1 0 0 0 U 50 50 0 0 w ENDDRAW ENDDEF # +# power_VCC +# +DEF power_VCC #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "power_VCC" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 75 25 0 1 0 N +P 2 0 1 0 0 0 0 50 N +X VCC 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# #End Library |