From b0430f23fb4bd48da18a3f0954763e2f10ae6c78 Mon Sep 17 00:00:00 2001 From: Dennis Brentjes Date: Mon, 16 Mar 2020 15:07:10 +0100 Subject: Updated to a new revision of the PiCl board, needs bypass caps and better fuses --- PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.lib | 46 +++++ PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.mod | 216 +++++++++++++++++++++ .../footprint/GCT_USB4085-GF-A_REVA.kicad_mod | 46 +++++ .../footprint/USB4085-GF-A_REVA.lib | 43 ++++ 4 files changed, 351 insertions(+) create mode 100644 PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.lib create mode 100644 PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.mod create mode 100644 PiCl/USB4085-GF-A-GCT/footprint/GCT_USB4085-GF-A_REVA.kicad_mod create mode 100644 PiCl/USB4085-GF-A-GCT/footprint/USB4085-GF-A_REVA.lib (limited to 'PiCl/USB4085-GF-A-GCT') diff --git a/PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.lib b/PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.lib new file mode 100644 index 0000000..611ba7c --- /dev/null +++ b/PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.lib @@ -0,0 +1,46 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +#(c) SnapEDA 2016 (snapeda.com) +#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 +# +# USB4085-GF-A_REVA +# +DEF USB4085-GF-A_REVA J 0 40 N Y 1 L N +F0 "J" -201 721 50 H V L BNN +F1 "USB4085-GF-A_REVA" -201 -802 50 H V L BNN +F2 "GCT_USB4085-GF-A_REVA" 0 0 50 H I L BNN +F3 "Package Analog Devices" 0 0 50 H I L BNN +F4 "USB4085-GF-A" 0 0 50 H I L BNN +F5 "Unavailable" 0 0 50 H I L BNN +F6 "None" 0 0 50 H I L BNN +F7 "Global Connector Technology" 0 0 50 H I L BNN +F8 "USB-C _USB TYPE-C_ USB 2.0 Receptacle Connector 24 _16+8 Dummy_ Position Through Hole, Right Angle" 0 0 50 H I L BNN +DRAW +P 2 0 0 10 -200 700 200 700 N +P 2 0 0 10 200 700 200 -700 N +P 2 0 0 10 200 -700 -200 -700 N +P 2 0 0 10 -200 -700 -200 700 N +X VBUS A4 -300 600 100 R 40 40 0 0 W +X VBUS A9 -300 600 100 R 40 40 0 0 W +X VBUS B4 -300 600 100 R 40 40 0 0 W +X VBUS B9 -300 600 100 R 40 40 0 0 W +X CC1 A5 -300 400 100 R 40 40 0 0 B +X CC2 B5 -300 300 100 R 40 40 0 0 B C +X DP1 A6 -300 200 100 R 40 40 0 0 B +X DP2 B6 -300 100 100 R 40 40 0 0 B +X DN1 A7 -300 0 100 R 40 40 0 0 B +X DN2 B7 -300 -100 100 R 40 40 0 0 B +X SBU1 A8 -300 -200 100 R 40 40 0 0 B +X SBU2 B8 -300 -300 100 R 40 40 0 0 B +X GND A1 -300 -600 100 R 40 40 0 0 P +X GND A12 -300 -600 100 R 40 40 0 0 P +X GND B1 -300 -600 100 R 40 40 0 0 P +X GND B12 -300 -600 100 R 40 40 0 0 P +X SHELL P1 -300 -500 100 R 40 40 0 0 P +X SHELL P2 -300 -500 100 R 40 40 0 0 P +X SHELL P3 -300 -500 100 R 40 40 0 0 P +X SHELL P4 -300 -500 100 R 40 40 0 0 P +ENDDRAW +ENDDEF +# +# End Library \ No newline at end of file diff --git a/PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.mod b/PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.mod new file mode 100644 index 0000000..d47c924 --- /dev/null +++ b/PiCl/USB4085-GF-A-GCT/USB4085-GF-A_REVA.mod @@ -0,0 +1,216 @@ +PCBNEW-LibModule-V1 +# encoding utf-8 +Units mm +$INDEX +GCT_USB4085-GF-A_REVA +$EndINDEX +$MODULE GCT_USB4085-GF-A_REVA +Po 0 0 0 15 00000000 00000000 ~~ +Li GCT_USB4085-GF-A_REVA +Cd +Sc 00000000 +At STD +Op 0 0 0 +.SolderMask 0 +.SolderPaste 0 +T0 -1.73252 -6.51541 1.00015 1.00015 0 0.05 N V 21 "GCT_USB4085-GF-A_REVA" +T1 -0.99164 5.83792 1.00154 1.00154 0 0.05 N V 21 "VAL**" +DA 4.325 -3.795 4.325 -4.095 -900 0.001 28 +DA 4.325 -3.795 4.625 -3.795 -900 0.001 28 +DS 4.625 -3.795 4.625 -2.295 0.001 28 +DA 4.325 -2.295 4.325 -1.995 -900 0.001 28 +DA 4.325 -2.295 4.025 -2.295 -900 0.001 28 +DS 4.025 -2.295 4.025 -3.795 0.001 28 +DA -4.325 -3.795 -4.325 -4.095 -900 0.001 28 +DA -4.325 -3.795 -4.025 -3.795 -900 0.001 28 +DS -4.025 -3.795 -4.025 -2.295 0.001 28 +DA -4.325 -2.295 -4.325 -1.995 -900 0.001 28 +DA -4.325 -2.295 -4.625 -2.295 -900 0.001 28 +DS -4.625 -2.295 -4.625 -3.795 0.001 28 +DA 4.325 -0.065 4.325 -0.365 -900 0.001 28 +DA 4.325 -0.065 4.625 -0.065 -900 0.001 28 +DS 4.625 -0.065 4.625 0.735 0.001 28 +DA 4.325 0.735 4.325 1.035 -900 0.001 28 +DA 4.325 0.735 4.025 0.735 -900 0.001 28 +DS 4.025 0.735 4.025 -0.065 0.001 28 +DA -4.325 -0.065 -4.325 -0.365 -900 0.001 28 +DA -4.325 -0.065 -4.025 -0.065 -900 0.001 28 +DS -4.025 -0.065 -4.025 0.735 0.001 28 +DA -4.325 0.735 -4.325 1.035 -900 0.001 28 +DA -4.325 0.735 -4.625 0.735 -900 0.001 28 +DS -4.625 0.735 -4.625 -0.065 0.001 28 +DS -5.3 2.075 5.9 2.075 0.127 27 +T2 5.703380 2.076230 1 1 0 .05 N V 25 ">PCB~Edge" +DS -4.475 -4.585 4.475 -4.585 0.1 27 +DS 4.475 -4.585 4.475 4.585 0.1 27 +DS 4.475 4.585 -4.475 4.585 0.1 27 +DS -4.475 4.585 -4.475 -4.585 0.1 27 +DS -4.475 -4.585 4.475 -4.585 0.2 21 +DS -4.475 1.725 -4.475 2.075 0.2 21 +DS -4.475 2.075 4.475 2.075 0.2 21 +DS 4.475 2.075 4.475 1.725 0.2 21 +DS -5.1 -4.825 5.15 -4.825 0.05 26 +DS 5.15 -4.825 5.15 4.825 0.05 26 +DS 5.15 4.825 -5.1 4.825 0.05 26 +DS -5.1 4.825 -5.1 -4.825 0.05 26 +$PAD +Sh "A1" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -2.975 -4.025 +$EndPAD +$PAD +Sh "A4" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -2.125 -4.025 +$EndPAD +$PAD +Sh "A5" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -1.275 -4.025 +$EndPAD +$PAD +Sh "A6" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -0.425 -4.025 +$EndPAD +$PAD +Sh "A7" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 0.425 -4.025 +$EndPAD +$PAD +Sh "A8" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 1.275 -4.025 +$EndPAD +$PAD +Sh "A9" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 2.125 -4.025 +$EndPAD +$PAD +Sh "A12" C 0.65 0.65 0 0 0 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 2.975 -4.025 +$EndPAD +$PAD +Sh "B1" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 2.975 -2.675 +$EndPAD +$PAD +Sh "B4" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 2.125 -2.675 +$EndPAD +$PAD +Sh "B5" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 1.275 -2.675 +$EndPAD +$PAD +Sh "B6" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 0.425 -2.675 +$EndPAD +$PAD +Sh "B7" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -0.425 -2.675 +$EndPAD +$PAD +Sh "B8" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -1.275 -2.675 +$EndPAD +$PAD +Sh "B9" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -2.125 -2.675 +$EndPAD +$PAD +Sh "B12" C 0.65 0.65 0 0 1800 +Dr 0.4 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -2.975 -2.675 +$EndPAD +$PAD +Sh "P1" O 2.216 1.108 0 0 900 +Dr 0.6 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -4.325 -3.045 +$EndPAD +$PAD +Sh "P2" O 2.216 1.108 0 0 900 +Dr 0.6 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 4.325 -3.045 +$EndPAD +$PAD +Sh "P3" O 2.216 1.108 0 0 900 +Dr 0.6 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po 4.325 0.335 +$EndPAD +$PAD +Sh "P4" O 2.216 1.108 0 0 900 +Dr 0.6 0 0 +At STD N 00C0FFFF +.SolderMask 0 +Ne 0 "" +Po -4.325 0.335 +$EndPAD +$EndMODULE GCT_USB4085-GF-A_REVA diff --git a/PiCl/USB4085-GF-A-GCT/footprint/GCT_USB4085-GF-A_REVA.kicad_mod b/PiCl/USB4085-GF-A-GCT/footprint/GCT_USB4085-GF-A_REVA.kicad_mod new file mode 100644 index 0000000..e8d98ae --- /dev/null +++ b/PiCl/USB4085-GF-A-GCT/footprint/GCT_USB4085-GF-A_REVA.kicad_mod @@ -0,0 +1,46 @@ + +(module GCT_USB4085-GF-A_REVA (layer F.Cu) (tedit 5E6F7ADA) + (descr "") + (fp_text reference REF** (at -1.097425 -6.515415 0) (layer F.SilkS) + (effects (font (size 1.0001496063 1.0001496063) (thickness 0.015))) + ) + (fp_text value GCT_USB4085-GF-A_REVA (at 9.18404 5.83792 0) (layer F.Fab) + (effects (font (size 1.00154330709 1.00154330709) (thickness 0.015))) + ) + (fp_line (start -5.3 2.075) (end 5.9 2.075) (layer F.Fab) (width 0.127)) + (fp_text user >PCB~Edge (at 5.70338 2.07623) (layer Dwgs.User) + (effects (font (size 0.800472440945 0.800472440945) (thickness 0.015))) + ) + (fp_line (start -4.475 -4.585) (end 4.475 -4.585) (layer F.Fab) (width 0.1)) + (fp_line (start 4.475 -4.585) (end 4.475 4.585) (layer F.Fab) (width 0.1)) + (fp_line (start 4.475 4.585) (end -4.475 4.585) (layer F.Fab) (width 0.1)) + (fp_line (start -4.475 4.585) (end -4.475 -4.585) (layer F.Fab) (width 0.1)) + (fp_line (start -4.475 -4.585) (end 4.475 -4.585) (layer F.SilkS) (width 0.2)) + (fp_line (start -4.475 1.725) (end -4.475 2.075) (layer F.SilkS) (width 0.2)) + (fp_line (start -4.475 2.075) (end 4.475 2.075) (layer F.SilkS) (width 0.2)) + (fp_line (start 4.475 2.075) (end 4.475 1.725) (layer F.SilkS) (width 0.2)) + (fp_line (start -5.1 -4.825) (end 5.15 -4.825) (layer F.CrtYd) (width 0.05)) + (fp_line (start 5.15 -4.825) (end 5.15 4.825) (layer F.CrtYd) (width 0.05)) + (fp_line (start 5.15 4.825) (end -5.1 4.825) (layer F.CrtYd) (width 0.05)) + (fp_line (start -5.1 4.825) (end -5.1 -4.825) (layer F.CrtYd) (width 0.05)) + (pad A1 thru_hole circle (at -2.975 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad A4 thru_hole circle (at -2.125 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad A5 thru_hole circle (at -1.275 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad A6 thru_hole circle (at -0.425 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad A7 thru_hole circle (at 0.425 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad A8 thru_hole circle (at 1.275 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad A9 thru_hole circle (at 2.125 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad A12 thru_hole circle (at 2.975 -4.025) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B1 thru_hole circle (at 2.975 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B4 thru_hole circle (at 2.125 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B5 thru_hole circle (at 1.275 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B6 thru_hole circle (at 0.425 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B7 thru_hole circle (at -0.425 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B8 thru_hole circle (at -1.275 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B9 thru_hole circle (at -2.125 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad B12 thru_hole circle (at -2.975 -2.675) (size 0.65 0.65) (drill 0.4) (layers *.Cu *.Mask)) + (pad P1 thru_hole oval (at -4.325 -3.045) (size 1.108 2.216) (drill oval 0.6 2.1) (layers *.Cu *.Mask)) + (pad P2 thru_hole oval (at 4.325 -3.045) (size 1.108 2.216) (drill oval 0.6 2.1) (layers *.Cu *.Mask)) + (pad P3 thru_hole oval (at 4.325 0.335) (size 1.108 2.216) (drill oval 0.6 1.4) (layers *.Cu *.Mask)) + (pad P4 thru_hole oval (at -4.325 0.335) (size 1.108 2.216) (drill oval 0.6 1.4) (layers *.Cu *.Mask)) +) \ No newline at end of file diff --git a/PiCl/USB4085-GF-A-GCT/footprint/USB4085-GF-A_REVA.lib b/PiCl/USB4085-GF-A-GCT/footprint/USB4085-GF-A_REVA.lib new file mode 100644 index 0000000..d6a6095 --- /dev/null +++ b/PiCl/USB4085-GF-A-GCT/footprint/USB4085-GF-A_REVA.lib @@ -0,0 +1,43 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +#(c) SnapEDA 2016 (snapeda.com) +#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0 +# +# USB4085-GF-A_REVA +# +DEF USB4085-GF-A_REVA J 0 40 N Y 1 L N +F0 "J" -201 721 50 H V L BNN +F1 "USB4085-GF-A_REVA" -201 -802 50 H V L BNN +F2 "GCT_USB4085-GF-A_REVA" 0 0 50 H I L BNN +F3 "Global Connector Technology" 0 0 50 H I L BNN +F4 "Manufacturer Recommendations" 0 0 50 H I L BNN +F5 "A" 0 0 50 H I L BNN +DRAW +P 2 0 0 10 -200 700 200 700 N +P 2 0 0 10 200 700 200 -700 N +P 2 0 0 10 200 -700 -200 -700 N +P 2 0 0 10 -200 -700 -200 700 N +X VBUS A4 -300 600 100 R 40 40 0 0 W +X VBUS A9 -300 600 100 R 40 40 0 0 W +X VBUS B4 -300 600 100 R 40 40 0 0 W +X VBUS B9 -300 600 100 R 40 40 0 0 W +X CC1 A5 -300 400 100 R 40 40 0 0 B +X CC2 B5 -300 300 100 R 40 40 0 0 B C +X DP1 A6 -300 200 100 R 40 40 0 0 B +X DP2 B6 -300 100 100 R 40 40 0 0 B +X DN1 A7 -300 0 100 R 40 40 0 0 B +X DN2 B7 -300 -100 100 R 40 40 0 0 B +X SBU1 A8 -300 -200 100 R 40 40 0 0 B +X SBU2 B8 -300 -300 100 R 40 40 0 0 B +X GND A1 -300 -600 100 R 40 40 0 0 P +X GND A12 -300 -600 100 R 40 40 0 0 P +X GND B1 -300 -600 100 R 40 40 0 0 P +X GND B12 -300 -600 100 R 40 40 0 0 P +X SHELL P1 -300 -500 100 R 40 40 0 0 P +X SHELL P2 -300 -500 100 R 40 40 0 0 P +X SHELL P3 -300 -500 100 R 40 40 0 0 P +X SHELL P4 -300 -500 100 R 40 40 0 0 P +ENDDRAW +ENDDEF +# +# End Library \ No newline at end of file -- cgit v1.2.3-70-g09d2